TeraSignal, a leader in intelligent interconnect technology, has officially announced the launch of TSLink, the world’s first intelligent chip-to-module (C2M) interconnect which is designed to revolutionize data transmission between large ASICs and linear optical modules. According to certain reports, the stated interconnect applies existing microcontroller resources in optical modules to effectively automate link training and performance monitoring, and guess what, it does that without mandating the use of any supplementary digital signal processors (DSPs). All in all, by doing what it does, TSLink greatly reduces power consumption and latency. Not just that, it also simplifies deployment so to enable a true plug-and-play linear optics solution for AI and high-performance computing. More on the same would reveal how the solution in question banks upon DSP-based SerDes functionality already present in AI ASICs and GPUs to conceive a streamlined connection, which in turn, optimizes performance across various protocols and modulation schemes. Such an architectural innovation, enabled by TeraSignal’s TS8401/02 Intelligent Re-Drivers, treads a long distance in the context of helping TeraSignal offer a highly adaptable and energy-efficient solution for next-generation AI infrastructure.
Another detail worth a mention here is rooted in TSLink’s ability to interface with existing ASICs, and therefore, achieve a significantly easier process when it comes to connecting ASICs to various types of linear optics, such as linear pluggable optics (LPO), near package optics (NPO), co-packaged optics (CPO) and active copper cables (ACC). Made to be agnostic to leading protocols (Ethernet, PCIe, InfiniBand, etc.), modulation schemes (NRZ, PAM4, etc.) and media (fiber, copper), TSLink further offers exceptional flexibility across different applications, making it a highly adaptable solution for various data transmission needs.
Talk about the solution’s features on a slightly deeper level, we must begin from its promise of automating link training. Here, TSLink leverages Common Management Interface Specification (CMIS) to automatically characterize the host to module channel, while simultaneously providing the optimum settings for the DSP-based transmitter in the host.
Next up, we ought to discuss the solution’s link diagnostic and monitoring capabilities that bring forth components like digital eye monitoring and bit error rate (BER) reporting. In essence, these features make it possible for users to easily monitor channel conditions and ensure optimal performance in the link. Moving on, TSLink also promises to cut down on power consumption. This it does by using existing microcontroller resources and eliminating the need for additional DSPs. The result is a 50% reduction in power consumption, something which makes TSLink a more sustainable solution for high-density AI deployments.
“TSLink is architected to unlock the full potential of modern high-speed interconnects by embedding intelligence directly into the C2M connection, minimizing power consumption and latency while ensuring optimal link performance,” said Dr. Armond Hairapetian, Founder and CEO of TeraSignal. “With its advanced link training and performance monitoring capabilities, TSLink transforms how data moves across today’s most demanding AI applications.”
We referred to the prospect of lower bit error rate, but what we haven’t mentioned is the way TSLink can eliminate that quantization noise introduced by analog-to-digital converters (ADCs) in DSP-based re-timers. One direct byproduct of this is a dramatically improved BER in the link. Alongside the knowhow to reduce bit error rate, TSLink also boasts the means to cut back on latency. You see, the solution removes the high latency caused by DSP processing, and therefore, enables shorter transmission time, which is critical for high-performance across compute-intensive AI applications.
Hold on, we are not done yet, as we haven’t touched upon the potential for improved signal integrity. The stated potential can be better understood once you take into account that advanced link training process shapes the transmit signal based on characteristics of each individual channel, ensuring maximum signal to noise ratio at the receiver. Apart from that, there is also a small form factor. With 50% reduction in silicon die size, TSLink makes the need for DSPs results practically redundant. Such a reduction also contributes a lot towards the pursuit of lower production costs and higher density linear optics.
